Job Description

Location: CA, Fremont

Experience: 3-6 Years

What you'll be doing:

• Set up x86 and SoC platforms for functional validation.
• Setting up of thermal solutions, debugger, oscilloscopes, and power measurement equipment.
• Configuring multi-boot OS with required SW, applications, tools, frameworks.
• Independently manage a group of systems to ensure stability and uninterrupted operation.
• Understand basic HW platform features - Chipset compatibility, Memory slots, expansion slots, connectivity ports, BIOS/UEFI settings.
• Basic scripting that includes modifying existing automation scripts where applicable.
• Basic understanding of different thermal solutions (e.g., air cooling, liquid cooling) and monitor temperature performance regularly - includes regular maintenance.
• Ability to configure and manage client applications on different OS environments.
• Ability to understand Client-Server workflow process and ability to analyse job logs, client logs, and test logs to identify and troubleshoot issues effectively.
• Strong troubleshooting skills to diagnose and resolve hardware, OS, and software-related issues.

Requirements:

• Diploma/B.E. with 3 years of experience in system level HW testing.
• Familiarity with assembling and testing X86/GPU based systems.
• Familiarity in executing tests under Windows and Linux environment.
• Basic knowledge on scripting and MS Excel.
• Understanding of test and measurement equipment such as oscilloscope, DAQ and DMM.
• Experience in silicon testing environment is preferred.
• Excellent organizational and documentation skills.

Job Description

Location: Bangalore, India

Experience: 3-6 Years

What you'll be doing:

• Set up x86 and SoC platforms for functional validation.
• Setting up of thermal solutions, debugger, oscilloscopes, and power measurement equipment.
• Configuring multi-boot OS with required SW, applications, tools, frameworks.
• Independently manage a group of systems to ensure stability and uninterrupted operation.
• Understand basic HW platform features - Chipset compatibility, Memory slots, expansion slots, connectivity ports, BIOS/UEFI settings.
• Basic scripting that includes modifying existing automation scripts where applicable.
• Basic understanding of different thermal solutions (e.g., air cooling, liquid cooling) and monitor temperature performance regularly - includes regular maintenance.
• Ability to configure and manage client applications on different OS environments.
• Ability to understand Client-Server workflow process and ability to analyse job logs, client logs, and test logs to identify and troubleshoot issues effectively.
• Strong troubleshooting skills to diagnose and resolve hardware, OS, and software-related issues.

Requirements:

• Diploma/B.E. with 3 years of experience in system level HW testing.
• Familiarity with assembling and testing X86/GPU based systems.
• Familiarity in executing tests under Windows and Linux environment.
• Basic knowledge on scripting and MS Excel.
• Understanding of test and measurement equipment such as oscilloscope, DAQ and DMM.
• Experience in silicon testing environment is preferred.
• Excellent organizational and documentation skills.

Job Description

Location: CA, Fremont

Experience: 2-6 Years

Description:

• Electrical validation of various IOs (PCIe, USB3, UFS, DP, HDMI, etc.) in different chips (GPU/SOC). This involves:
  • Understanding the test plan.
  • Setting up the DUT for different test cases, executing them, and recording observations for each case clearly.
  • Understanding spec expectations and flagging any failures to meet them.
  • Performing first-level triage of issues/failures (e.g., analyzing and confirming that it is an actual failure and not caused by a board, measurement setup, or other issue), followed by data collection to root-cause the failures and find a fix.

Requirements:

Educational Qualifications:

• B.E. degree with Electrical/Electronic as major subjects.

Work Experience:

• 2 to 6 years of relevant work experience.

Technical Skills:

Required:

• Clarity on signal integrity concepts (e.g., insertion loss, reflections, crosstalk, etc.).
• Clarity on signal quality parameters (e.g., eye diagram, jitter, frequency ppm, duty cycle, etc.) and how to measure them.
• Familiarity with working in a lab environment and strong knowledge of using various equipment like DSO, Multimeter, Power supplies (e.g., idea about ESD, minimum oscilloscope/probe BW required for measurement, etc.).
• Knowledge to understand board design from schematics (*.pdf file) and layout (*.brd file - using Cadence Allegro tool) (e.g., should be able to understand signal/power topology from schematics, should be able to locate test points in PCB for signal of interest, etc.).
• Knowledge to assemble an x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe AIC, display, other peripherals, etc. to the x86 motherboard).
• Knowledge of board/chip bring-up flow (e.g., idea on list of items to verify before/after attaching chip to board, like verifying No-Stuff components, impedance of voltage rails, etc.).
• Proficiency in Windows & Linux OS and Microsoft Office tools (e.g., in Linux: navigate folders, edit text files, move/copy files, SSH, execute scripts, etc.).
• Familiarity with scripting languages like Python/Perl (e.g., idea about installing different python modules, execute python scripts, etc.).

Desirable:

• Knowledge and hands-on experience on high speed SERDES IO (like PCIe, USB3, UFS, Ethernet, etc.) validation (e.g., eye measurement, JTOL testing, etc.).
• Knowledge and hands-on experience of using equipment like BERT (Bit Error Ratio Tester), PCIe/USB3/UFS Logic Analyzer, etc.
• Knowledge and hands-on experience on Silicon PVT characterization.
• Knowledge and hands-on experience on board bring-up and testing.

Soft Skills:

• Be an effective team player (e.g., volunteer to take up work, own up the task and approach folks to get things done, etc.).
• Communicate observations/requirements in a crisp and straightforward way.

Other:

• Engineer should be comfortable working from the office (lab) every day (excluding holidays).

Job Description

Location: Bangalore, India

Experience: 2-6 Years

Description:

• Electrical validation of various IOs (PCIe, USB3, UFS, DP, HDMI, etc.) in different chips (GPU/SOC). This involves:
  • Understanding the test plan.
  • Setting up the DUT for different test cases, executing them, and recording observations for each case clearly.
  • Understanding spec expectations and flagging any failures to meet them.
  • Performing first-level triage of issues/failures (e.g., analyzing and confirming that it is an actual failure and not caused by a board, measurement setup, or other issue), followed by data collection to root-cause the failures and find a fix.

Requirements:

Educational Qualifications:

• B.E. degree with Electrical/Electronic as major subjects.

Work Experience:

• 2 to 6 years of relevant work experience.

Technical Skills:

Required:

• Clarity on signal integrity concepts (e.g., insertion loss, reflections, crosstalk, etc.).
• Clarity on signal quality parameters (e.g., eye diagram, jitter, frequency ppm, duty cycle, etc.) and how to measure them.
• Familiarity with working in a lab environment and strong knowledge of using various equipment like DSO, Multimeter, Power supplies (e.g., idea about ESD, minimum oscilloscope/probe BW required for measurement, etc.).
• Knowledge to understand board design from schematics (*.pdf file) and layout (*.brd file - using Cadence Allegro tool) (e.g., should be able to understand signal/power topology from schematics, should be able to locate test points in PCB for signal of interest, etc.).
• Knowledge to assemble an x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe AIC, display, other peripherals, etc. to the x86 motherboard).
• Knowledge of board/chip bring-up flow (e.g., idea on list of items to verify before/after attaching chip to board, like verifying No-Stuff components, impedance of voltage rails, etc.).
• Proficiency in Windows & Linux OS and Microsoft Office tools (e.g., in Linux: navigate folders, edit text files, move/copy files, SSH, execute scripts, etc.).
• Familiarity with scripting languages like Python/Perl (e.g., idea about installing different python modules, execute python scripts, etc.).

Desirable:

• Knowledge and hands-on experience on high speed SERDES IO (like PCIe, USB3, UFS, Ethernet, etc.) validation (e.g., eye measurement, JTOL testing, etc.).
• Knowledge and hands-on experience of using equipment like BERT (Bit Error Ratio Tester), PCIe/USB3/UFS Logic Analyzer, etc.
• Knowledge and hands-on experience on Silicon PVT characterization.
• Knowledge and hands-on experience on board bring-up and testing.

Soft Skills:

• Be an effective team player (e.g., volunteer to take up work, own up the task and approach folks to get things done, etc.).
• Communicate observations/requirements in a crisp and straightforward way.

Other:

• Engineer should be comfortable working from the office (lab) every day (excluding holidays).

Job Description

Location: Bangalore, India

Experience: 3-7 Years

Requirements

• Development of key building blocks of memory architecture such as Row Decoder, IO, Control.
• Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing.
• Compiler level integration, verification of Compiler/Custom memories.
• Layout Design of SRAM/CAM/RF compiler memories in 5/3FF technology.
• Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc.
• Good problem solving and logical reasoning skills.
• Good communication skills required.

Job Description

Location: Bangalore, India

Experience: 6-15 Years

Requirements

We are looking for energetic and passionate memory design validation engineers for the development of memory compilers and custom macros of all types on the leading edge of process technology. Typically requires a minimum of 6+ years of relevant experience.

Job Description Summary

Contribute towards Memory Design Validation of SRAM, Multi-Ports, Register File, TCAM, and ROM memory compilers as well as custom macros in 3nm and other cutting edge process technologies.

Job Description

• Perform various QA and validation checks to ensure accurate timing and power models.
• Develop scripts to automate verification flow and data analysis.
• Support silicon debugs and correlation to spice models.
• Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers.
• Perform functional verification, root cause design discrepancies, and help resolve them.
• Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them.
• Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them.
• Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins.
• Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them.
• Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan.

Skill Sets

• Strong expertise in development of memory macros of all types and architectures.
• Strong understanding of transistor level circuit behavior and analysis.
• Good understanding of the layout and their related challenges in sub nanometer process technologies.
• Good understanding of signal integrity, EM/IR, and reliability analysis.
• Good understanding of memory behavioral and physical models.
• Good understanding of DFT Schemes and chip level integration.
• Proficient in running transistor level simulators, writing automation scripts, and are tools savvy.
• Complete hands on experience in using Cadence schematic/layout editor tools.
• Complete hands on experience with transistor level simulators, Monte Carlo variation analysis, waveform viewer tools such as; HSPICE, HSIM, XA, FineSim, XARA, nWave, waveform viewer, etc.
• Experience in Skill/Perl/Python Scripting is a strong plus.
• Good communication, interpersonal, and leadership skills.
• Good debugging skills, problem solving and logical reasoning skills.
• Motivated, self-driven and good at multi-tasking.

Job Description

Location: Bangalore, India

Experience: 8-10 Years

Requirements

• FPGA lead engineer with 8-10 yrs hands-on experience in handling FPGA design and verification.
• Should have handled RTL to bitstream design cycle on million+ gate FPGAs.
• Expertise in design partitioning, timing constraints and optimizing resource utilization.
• Should have familiarity with Intel Quartus or AMD Vivado design flows.
• Should have expertise in handling standard debugging tools such as ChipScope or custom debug tools.
• Expertise in configuring and bringing up embedded ARM cores will be an added plus.
• Expertise in FPGA based SoC emulation will also be highly beneficial.

Job Description

Location: Bangalore, India

Experience: 7-10 Years

Skills Required

• UVM, System Verilog, System C, Perl, Python, C/C++
• Protocol Knowledge - APB/AXI/CHI
• PCIE/CXL/UCIE/Ethernet
• DDR5/LPDDR5/
• JTAG/I3C/SPI
• HBM
• Arch Domain Knowledge - Processor, memory architecture, Coherency, Performance
• Tools/Flows - Questa, Visualizer
• Execute test plan and close coverage
• Write C tests
• Write SV Directed/constrained random tests
• Write Cover points, coverage closure
• Write SV Assertions
• Develop UVM, SV testbench components, complex checker, high level stimulus
• Strong debug and communication skills
• IP level verification
• PCIE/CXL/UCIE/Ethernet/DDR SubSystem Verification
• Processor verification
• Virtualization
• Coherent/non-coherent Fabric verification
• SOC verification
• Phy bring up
• UPF simulation
• Protocol Compliance Suite testing
• Gate Level Simulation

Job Description

Location: Bangalore, India

Experience: 4-6 Years

Requirements

• Develop and implement DFT infrastructure in Silicon design
• Verify DFT implementation for Correctness
• Generate test vectors, analyze and debug simulation results, improve coverage
• Deep knowledge and hands on experience with Scan insertion flows and resolving DRC
• On ChipClock controller
• Test Compression techniques
• ATPG (experience with Tessent preferred)
• Test vectors and Simulation debug

Job Description

Location: Bangalore, India

Experience: 4-8 Years

Requirements

• Deep knowledge of Electromigration & IR drop concepts
• Hands on experience with Voltus (Cadence) or Redhawk(ANSYS) tools

Job Description

Location: Bangalore, India

Experience: 8-10 Years

Requirements

• Design ML models with an emphasis on computational efficiency and performance.
• Work closely with compiler and runtime teams to ensure models are optimized for specific hardware architectures.
• Experience developing production ML workflows, working with SOTA deployments techniques involving VectorDB and utilities like LangChain.
• Deep knowledge of ML algorithms and model architectures, experience with ML frameworks, and understanding of hardware constraints impacting model design.

Job Description

Location: Bangalore, India

Experience: 8-10 Years

Requirements

• Design and develop the system software required to support running the ML runtime and SW stack, system initialization configuration management system, observability, and monitoring.
• Develop the hardware abstraction layer and necessary drivers.
• Deep knowledge of System HW & SW, including hands on experience with Bootstrapping flow and System Security.
• Experience in instrumenting tools and automation utilities for System Configuration and Analysis of the Observability and Monitoring trace data.

Job Description

Location: Bangalore, India

Experience: 8-10 Years

Responsibilities

• Design and implement the backend compilers that optimize code for specialized hardware like vector processors and systolic arrays, crucial for accelerating ML workloads.
• Expertise in low-level programming and assembly language, knowledge of computer architecture, particularly vector and systolic array designs, and experience with performance tuning and analysis.
• Domain programming skills: LLVM and C/C++.

Job Description

Location: Bangalore, India

Experience: 5-7 Years

Responsibilities

• Experience and knowledge in C, development static and dynamic analysis tools, RTOS.
• Write firmware to meet the needs of the product family.

Job Description

Location: Bangalore, India

Experience: 4-8 Years

Requirements

• Hands-on experience with DV/DRC/LVS flows (from Cadence/Mentor) for advanced process nodes
• Define and verify Sign-off Methodology

Job Description

Location: Available to work from Noida office, India

Experience: 5-10 Years

When to start: Immediate

Qualifications:

• Bachelor’s/Master's degree in Electrical/Electronics/Power-Electronics Engineering or related field.
• 5-10 years of working experience.
• Proficiency in embedded C programming, RTOS, and microcontroller systems.
• Good understanding of hardware requirements for driving the rated motor control, with thorough knowledge of hardware requirements in the power stage (Inverter) for driving the motor.
• Hands-on experience with motor control algorithms and MATLAB Simulink.
• Experience with hardware platforms such as S32K, DSC56F8xxx.
• Strong debugging and problem-solving skills.
• Ability to work independently and collaborate effectively within a cross-functional team.

Requirements:

• Hands-on experience with motor control algorithms and MATLAB Simulink.
• Must have knowledge of various motor technologies, including some or all of the following:
  • BLDC motors
  • PMSM
  • Induction Motors
  • Switched Reluctance Motors
• Work experience in control methods, including some or all of the following:
  • Vector control
  • Sensorless control
  • Scalar control
  • Field weakening
  • Scalar control
• Integration of the motor and the motor controller at a vehicle level, ensuring that vehicle-level performance requirements are met.
• Failure analysis of Motor/Controller.
• Preparation of technical documents required for motor/controller, including selecting the right motor based on the motor power/torque curves.
• Knowledge of automotive protocols – CAN, LIN & other serial communication protocols.
• Understanding of functional safety and MCAL drives will be a plus.

Responsibilities:

• Designing motor control system & algorithms.
• Design and implement control algorithms through MATLAB simulation and conduct system diagnostics/prognostics.
• Develop embedded firmware for PMSM/BLDC motor control solutions.
• Implement and optimize motor control algorithms, including FOC control, current control, torque control, speed and position control, modulation techniques, space vector modulation, SinPWM, etc.

Job Description

Location: Available to work from Noida office

Experience: 7-10 Years

Technical Skills:

• Strong C coding and debugging skills are a must.
• Understanding of communication protocols (at least two) like I2C, SPI, UART, GPIO, and device drivers software is a must.
• Hands-on Firmware & board bring-up (Pinctrl framework, device drivers, and applications, etc.) is a must.
• Ability to understand IC/IP datasheets, board schematics, SoC reference manuals, Programmer's Guide, and map it to software code is a must.
• Understanding of Arm architecture.
• Experience with one or more Operating Systems, Device Driver, and Bootloaders: RTOS/FreeRTOS/Zephyr/NuttX/PX4, Linux, U-Boot.
• Design, build, and unit test - Drivers, Middleware and/or Application, as per project requirements.
• Familiarity with Software Development Process, BSP Releases, open-source software development process.
• Prior experience working on NXP products like LPC, S32, i.mx is a big advantage.
• Experience with ARM JTAG Debugger: Lauterbach, etc.

Soft Skills:

• Excellent interpersonal and communication skills, good spoken and written English skills.
• Good teamwork adaptability and self-motivated.
• Fast learner with an interest in learning new skills.
• Good problem-solving ability.

Responsibilities:

• Bring-up of boards with NXP SoC, which involves understanding board schematics, reference manuals of SoCs, datasheets of ICs, and customizing BSP components accordingly.
• Design, build, and unit test - Drivers, Middleware and/or Application, as per project requirements.
• Collaborate with different component owners for the development of components required for the project.
• Debugging and fixing customer issues.